ENGINEERING TRIPOS PART IIA – 2012/2013
Module 3B2 – Integrated Digital Electronics
This module introduces the principles of design and operation of the
major digital integrated circuit technologies.
The importance of miniaturising digital circuits and their key role
in microprocessors, memories and elsewhere are discussed.
Techniques such as tabular minimisation and hazard analysis for the
design of trouble-free combinatorial logic circuits are described.
The module shows how to use LSI chips such as Programmable Logic Arrays,
how to minimise the number of states in a system and how to design both
synchronous and asynchronous sequential logic systems.
The module is organised in two sections, each having 8 lectures.
The syllabuses for each section are given below:
1. Logic Circuits (8L)
Logic simplification and synthesis, tabular methods (L & P Chap.
3, Roth Chap 6-8).
Logic functions using multiplexers, logic arrays, ROMs, PLAs, PALs
(L & P Chaps. 4.5, 5.3, 5.4, Roth Chap 9 ).
Hazards: static and dynamic, correction (L &P Chap. 5.5, Roth
Design of asynchronous sequential circuits (L & P Chap.
8, Roth Chap 23-25).
Design of synchronous sequential circuits (L & P Chap. 7, Roth
Chap 16). Sequential network design with PLDs ( Roth Chap 19)
Reverse engineering to extract from a hardware implementation of
sequential circuit, the state table and state diagram
Alternative logic. Introduction to Quantum computation.
2. Digital Circuits (8L)
Introduction to digital microelectronics.
Logic gate definitions; inverter transfer characteristics, noise
margins, rise times, fall times, delay times, etc. (H & J, Chap. 1)
MOS Transistors (H & J, Chap. 2).
MOS and CMOS Inverters (H & J Chap. 3).
Bipolar Transistors and charge storage (H & J Chap. 4).
ECL (H & J, Chap. 7).
BiCMOS gates. Schmitt triggers (H & J, Chapter 8).
Semiconductor memories: static and dynamic RAM circuits (H &
J, Chapter 9).
On completion of the course students should be able to:
Use the Quine-McClusky method to simplify logic having 5 or more inputs;
to be familiar with Prime Implicant tables; be able to use the Prime Implicant
function to choose the simplest logic solution; be able to deal with "Don't-care".
Use both map and algebra methods to detect and correct for logic hazards;
be aware of all the different types of hazards.
Analyse and synthesise how LSI circuits are used in logic; Multiplexers,
Read-only Memories, Programmable Logic Devices (PLD, PLA, PAL) are all
to be understood in this application.
Design sequential logic circuits; to know about the Moore and Mealy models.
In design, to be able to eliminate equivalent states, to know about merging,
and to be able to choose the best bistable allocation, and to use all bistable
Design of asynchronous and synchronous circuits. Know how synchronous design
is simpler than asynchronous design. Use of reverse engineering. Use of
complex PLDs for design of sequential networks.
Appreciate the drive to miniaturise digital circuits and understand how
this has improved performance and reduced cost.
Know the definitions for noise margins, rise times, fall times and transfer
characteristics for digital circuits.
Be aware of the two operating regions (saturation and non-saturation) of
the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) and understand
how the equations for the two regions are used to design and estimate the
performance of digital circuits.
Appreciate the evolution of MOSFET inverters from the resistive load inverter
through the enhancement and depletion transistor load inverters to the
Plot the transfer characteristics and calculate the rise times for NMOS
and CMOS inverters.
Know the basic gate circuits for NMOS and CMOS logic and be able to compare
Distinguish between the cut-off, linear and saturation regions of the bipolar
transistor and know how the Ebers-Moll equations are used to design and
estimate the performance of bipolar transistor digital circuits.
Explain charge storage in diodes and bipolar transistors and understand
how it limits the switching speed of bipolar digital circuits.
Explain the operation of bipolar/CMOS (BiCMOS) circuits and be aware of
their advantages for fast logic gates.
Explain the operation of Emitter Coupled Logic (ECL) logic circuits and
be able to plot the transfer characteristic and calculate the risetime
for an ECL inverter.
Understand the operation of the MOS Schmitt trigger and be able to calculate
the trigger voltages.
Understand the operating principles and design challenges of static and
Please see the Booklist for Part IIA Courses for references for this module.
Last updated: June 2012